High-density

HDI

HDI moves interconnect off the surface and into the build-up. Laser microvias from 100 µm and 75 µm lines let a design shrink by a board size or two without giving up routing space — which is why BGAs below 0.5 mm pitch usually leave no alternative.

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At a glance

Min. line / gap 75 / 75 µm

Microvia Ø ≥ 0.10 mm

Build-up 1+N+1 … 4+N+4

Layer count 4 – 24

Min. BGA pitch 0.35 mm

HDI — High Density Interconnect — is not a single technology but a set of them: laser-drilled microvias, sequential lamination, filled and capped vias, and structures well below what a mechanical drill can reach. Together they raise the interconnect density per layer far enough that a design needing twelve conventional layers often closes in eight.

The decision is rarely about the technology and almost always about the component. Once a BGA drops below 0.5 mm pitch, escape routing with through-holes stops working: there is no room left between the pads for both a via and a track. From that point HDI is not an optimisation but the entry ticket — and the question shifts to how many build-up stages the design actually needs.

What it delivers

[ Overview ]

Density per layer

Microvias free up the space that through-holes block on every layer they pass. Designs that would need 12 conventional layers frequently close in 8.

Shorter signal paths

Interconnect happens between adjacent layers instead of through the whole stack. Stub lengths drop, which shows directly in the eye diagram above a few GHz.

Smaller outline

Finer structures and denser escape routing shrink the board, which in turn cuts panel cost — the part of HDI that most often pays for itself.

Build and options

[ Datasheet ]

Feature	Specification
Material	FR-4, High-Tg FR-4, halogen-free laminates, low-loss builds on request
Layers	4 – 24 (1+N+1 to 4+N+4)
Final thickness	0.4 – 3.2 mm
Copper	12 – 105 µm (standard 18 or 35 µm)
Surface finish	ENIG, OSP, immersion silver/tin, lead-free HASL
Solder mask	Green, blue, black, white — high precision, 10 – 20 µm
Typical use	Telecommunications, mobile, automotive, medical, servers

The usual build for this line. Anything outside it is normally still possible — ask and we will confirm.

HDI limits

[ Specification ]

Standard runs without a surcharge. Advanced is feasible but needs a feasibility check before layout freeze — and shows up in both price and lead time.

Parameter	Standard	Advanced	Note
Line / gap	75 / 75 µm	—	Verified minimum on 18 and 35 µm copper
Microvia Ø	0.100 mm	—	Verified minimum; laser-drilled, one dielectric layer deep
Microvia target pad	0.30 mm	0.25 mm	Must be filled and capped when vias are stacked
Build-up	1+N+1	to 4+N+4	Each extra stage adds a lamination and drill cycle
Layer count	4 – 16	18 – 24	Symmetry around the core is mandatory
Aspect ratio (µvia)	0.8 : 1	1 : 1	Depth against diameter, not the through-hole figure
BGA pitch	0.50 mm	0.35 mm	Below 0.4 mm via-in-pad is effectively required
Final thickness	0.8 – 2.0 mm	0.4 – 3.2 mm	Thin builds need careful handling in assembly

Guide values for pre-selection. Binding values are confirmed per project against your data.

Typical applications

[ Use cases ]

Smartphone and wearable main boards

Automotive front-camera and radar control units

Module carriers for 5G base stations

Medical imaging and endoscopy electronics

High-channel-count industrial sensor heads

SoC and FPGA carriers with fine-pitch BGAs

Design rules

[ Layout ]

The points below are what most often comes back as a query after data review. Settling them before layout freeze saves a loop.

Fix the build-up before routing

A 1+N+1 and an any-layer build differ in cost by a factor, not a percentage. Deciding it after routing usually means re-routing.

Prefer staggered over stacked microvias

Stacked vias need filled and capped target pads at every level and are markedly more process-sensitive. Staggered is cheaper and more robust — use stacking only where the escape genuinely demands it.

Respect the microvia aspect ratio

A microvia goes through one dielectric layer. Depth to diameter should stay at or below 1 : 1 — deeper holes plate unevenly at the base.

Plan via-in-pad as filled and capped

A via left open in a solder pad wicks paste away during reflow and starves the joint. Below 0.4 mm pitch, filled and capped is the only reliable answer.

Frequently asked

[ FAQ ]

When does HDI actually pay for itself?

Usually at the point where it saves layers or board area. Two saved layers, or an outline that fits more copies into the panel, often more than covers the surcharge for laser drilling. Below 0.5 mm BGA pitch the question does not really arise — there is no conventional route.

What is the difference between 1+N+1 and any-layer?

1+N+1 puts one microvia layer on each side of a conventional core, so only the outermost dielectric is laser-drilled. Any-layer means every layer pair can be connected by microvia, which needs a lamination and drill cycle per level — far more freedom, and a considerably higher price.

Do you need a test coupon?

For HDI with impedance requirements, yes — the coupon is the only evidence of what was actually built if a complaint follows. We add it in the panel; it costs nothing in a series panel.

Which surface finish suits fine-pitch HDI?

ENIG in practically every case. HASL leaves an uneven topography that causes bridging below 0.5 mm pitch, and OSP has too short a shelf life for multi-stage assembly.

Not sure what fits?

Get your data checked

Applications in the vehicle

HDI